NSRRC Activity Report 2022

Facility Development and Status 093 θ 2 , as indicated by Eq. (3). The compensation direction was then determined to be counterclockwise when θ 2 was less than 180° and clockwise otherwise. Therefore, the compensation phase θ PDCL was increased by 1° to approach the desired operation in the counterclockwise case, whereas this phase was decreased by 1° in the clockwise case. After θ PDCL was obtained, it was then sent to a calibration/rotation circuit to calculate the output of the PID controller as new I out and Q out values. Finally, the output IQ data (the in-phase component and quadrature-phase component data) were modulated to an IF (intermediate frequency) band signal and then transmitted by the DAC to the klystron preamplifier to generate the expected RF power. Performance of the PDCL Figure 4 depicts the phase compensation of the PDCL and PID controller during the entire injection period. The compensation provided by the PID controller and PDCL was 40° and 17°, respectively, during the first 17 ms of switching to the injection mode. The PDCL then mostly compensated for the phase drift to allow the PID controller to operate in an extremely limited loading range. Because the phase drift slope was considerably smaller than 1°/ms, the PID controller contributed to a rapid response to provide an immediate compensation of approximately -40° and 40° during switching to the injection mode and energy-saving mode, respectively. Simultaneously, the PDCL contributed to a slow but stable compensation phase with a constant speed of 1°/ms as expected. The combination of the PID controller and PDCL allowed the phase of the RF cavity to remain stable during the entire injection period. Improvement of the Phase Accuracy Figure 5 depicts the measured P t phases with and without a PDCL in the DLLRF system for the TPS booster RF system. During the injection period, phase P t remained stable within ±0.7° when the PDCL was used, whereas the set gap voltage of the cavity regularly fluctuated at a frequency of 3 Hz. This scenario was regarded as a considerable improvement to the ±3.5° fluctuation observed in the absence of a PDCL. The distribution of the phase errors of the two operating conditions was examined by counting the phase errors within various ranges while the gap voltage fluctuated. Fig. 4 : Compensation phases of the PDCL and PID controller during mode switching. Fig. 5 : Accuracy improvement achieved for the P t phase by using the PDCL. Power-Saving Ratio Table 1 (see next page) presents the annual power consumption data under various conditions. Each normal injection cycle spanned 242 s, which comprised a standby period (240 s) and brief injection period (2 s). The annual power consumption values for the PDCL and no- power-saving scenario were 527.82 and 1324.32 MWh, respectively. The power-saving ratio (PSR) was calculated using the following equation: ........................... (4) where P Energy saving off is the annual power consumption in the no-power-saving scenario and P x is the annual power consumption of the PDCL. In this scenario, the PDCL not only had a high PSR of 60% but also achieved stable gap voltage phase control. Therefore, the PDCL is the optimal PSR = × 100% P Energy saving o P Energy saving o – P x U 1 st (t) = ∫ 0 C t B y ( z ) dz IC δt 2T U 2 nd (t) = ∫ 0 C t ∫ 0 C t’ B y ( z ) dzdz’ I 2T << λ U C 0 ∆ t1st